Fabrication process of BiCMOS technology

 

BiCMOS Logic:

Bicmos technology is a complex processing technology that gives NMOS and PMOS advances amalgamated each other with the upsides of having extremely low power utilization bipolar innovation and high speed over CMOS innovation. MOSFETs give high input impedance logic gates  and bipolar semiconductors give high current increase.

Steps for BiCMOS Fabrication:

 BiCMOS manufacture process  is similar of creation of BJT and CMOS, but only variety is an acknowledgment of the base. The following steps shows the BiCMOS manufacture process

Step1:  P-Substrate is taken as shown in the below figure

P-substrate

Step2:  P-substrate is covered with the oxide layer

P-substrate with oxide layer

Step3: A little opening is made on the oxide layer

Opening is made on the oxide layer

Step4: N-type impurities are heavily doped through that opening

N-type impurities are intensly doped through the opening

Step5: The P – Epitaxy layer is grown on the whole surface

Epitaxy layer is grown on the whole surface

Step6: Again, whole layer is covered with the oxide layer and two openings are made through this oxide layer.

two openings are made through the oxide layer

Step7: From the openings made through oxide layer n-type impurities are diffused to shape n-wells

n-type impurities are diffused to shape n-wells

Step8:  Three openings are made through the oxide layer to form three active devices.

Three openings are made through the oxide layer to form three active devices

Step9:  Gate terminals of NMOS and PMOS are shaped by covering and designing the whole surface with Thinox and Polysilicon.

The gate terminals of NMOS and PMOS are formed with Thinox and Polysilicon

Step10: At that point P-impurities are added to shape the base terminal of BJT and comparative, N-type impurities are vigorously doped to  producer emmiter terminal of BJT, source and channel of NMOS and for contact reason N-type impurities are doped into the N-well collector.

P-impurities are added to form the base terminal of BJT

Step11: To form source and drain regions of PMOS and to make contact in P-base region the P-type impurities are heavily doped.

P-type impurities are heavily doped to form source and drain regions of PMOS

Step12: Then the whole surface is covered with the thick oxide layer.

whole surface is covered with the thick oxide layer

Step13: Through the thick oxide layer the slices are designed to frame the metal contacts.

The slices are patterned to form the metal contacts

Step14: The metal contacts are made through the slices made on oxide layer and the terminals are named as appeared in the below figure.

                                   

Metal contacts are made through the slices and terminals are named

Manufacture of BICMOS is appeared in the above figure with a combination of NMOS, PMOS and BJT. In the manufacture cycle a few layers are utilized, for example, channel stop implant, thick layer oxidation and guard rings. 

The creation cycle will be hypothetically hard for including both the advancements CMOS and bipolar. Parasitical bipolar semiconductors are delivered incidentally is an issue of manufacture while handling p-well and n-well CMOS. For the creation of BiCMOS numerous extra advances added for adjusting of bipolar and CMOS parts. Henceforth, the expense of complete manufacture increments. 

Channel stopper is embedded in semiconductor devices as appeared in the above figure by utilizing implantation or diffusion or different strategies to restrict the spreading of channel region or to evade the arrangement of parasitic channels. 

The high impedance hubs assuming any, may cause the surface leakage currents  and to stay away from the progression of current in spots where the current stream is confined these guard rings are utilized.

References:

https://www.iue.tuwien.ac.at/phd/puchner/node48_app.html

https://en.wikipedia.org/wiki/BiCMOS

https://www.brainkart.com/article/BiCMOS-Technology-Fabrication_13173/

Author:  Priti Arya